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Project design for computer architecture practical sessions based on field-programmable gate array

Abstract

Field-programmable logic arrays are often used in courses on computer architecture. The student must describe the processor with the external components necessary for its operation in the specified HDL (hardware description language) language according to the provided specification during a certain number of projects. The weakness of this approach is that the basis of such projects is a processor of one specific architecture, so the lecturer faces the issue of individualization of projects. This article proposes a solution based on dedicated processors instead of one programmable processor of a specific architecture. It’s shown here that the issue of project individualization is easier solvable in the proposed way, and it does not deviate from the theory of computer architecture, because the programmable processor is a generalization of a dedicated processor. The article describes project design ideas based on dedicated processors and gives some examples. Represented different instance than was applied during practical sessions of Computer Architecture that are held at the Department of Electronic Systems within VILNIUS TECH, i.e. certain modifications, and additions were applied.


Article in Lithuanian.


Kompiuterių architektūros užduočių sudarymas tyrimams, atliekamiems lauku programuojamomis loginėmis matricomis


Santrauka


Kompiuterių architektūros užduotys dažnai skirtos tyrimams atlikti lauku programuojamomis loginėmis matricomis. Studentas pagal pateiktą specifikaciją turi nurodyta HDL (angl. hardware description language) kalba aprašyti procesorių su jo veikimui būtinais išoriniais komponentais. Problema yra ta, kad šiuo atveju pagrindas yra vienos konkrečios architektūros procesorius, todėl dėstytojas susiduria su užduočių individualizavimo problema. Šiame straipsnyje siūlomas sprendimas, kurio pagrindas yra skirtiniai procesoriai vietoje vieno konkrečios architektūros programuojamo procesoriaus. Čia parodoma, kad taip žiūrint užduočių individualizavimo problema lengviau sprendžiama, o nuo kompiuterių architektūros teorijos nenutolstama, nes programuojamas procesorius yra apibendrintas skirtinio procesoriaus atvejis. Straipsnyje pateikti užduočių pavyzdžiai skirti tyrimams atlikti lauku programuojamomis loginėmis matricomis. Pateiktos sąsajos su kompiuterių architektūros teorine medžiaga. Aprašomas kitas užduočių variantas negu buvo taikytas praktikoje dėstant kompiuterių architektūros studijų modulį VILNIUS TECH Elektroninių sistemų katedroje, t. y. atlikti tam tikri pakeitimai ir papildymai.


Reikšminiai žodžiai: kompiuterių architektūra, užduotis, tyrimas, modeliavimas, VHDL sintaksė, lauku programuojamos loginės matricos.

Keyword : computer architecture, project design, simulation, VHDL syntax, field programmable gate array

How to Cite
Bartnykas, K. (2021). Project design for computer architecture practical sessions based on field-programmable gate array. Mokslas – Lietuvos Ateitis / Science – Future of Lithuania, 13. https://doi.org/10.3846/mla.2021.15184
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Sep 2, 2021
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References

Comer, D. (2020). Essentials of computer architecture (2nd ed.). Taylor & Francis.

Ichsan, M. H. H., & Kurniawan, W. (2017). Design and implementation 8 bit CPU architecture on Logisim for undergraduate learning support. In 2017 International Conference on Sustainable Information Engineering and Technology (SIET) (pp. 132–137). IEEE. https://doi.org/10.1109/SIET.2017.8304123

Lee, J. H., Lee, S. E., Yu, H. C., & Suh, T. (2012). Pipelined CPU design with FPGA in teaching computer architecture. IEEE Transactions on Education, 55(3), 341–348. https://doi.org/10.1109/TE.2011.2175227

Markettos, A. T., Moore, S. W., Jones, B. D., Spliet, R., & Gavrila, V. A. (2016). Conquering the complexity mountain: fullstack computer architecture teaching with FPGAs. In 2016 11th European Workshop on Microelectronics Education (EWME) (pp. 1–6). IEEE. https://doi.org/10.1109/EWME.2016.7496457

McGrew, T., Schonauer, E., & Jamieson, P. (2019). Framework and tools for undergraduates designing RISC-V processors on an FPGA in computer architecture education. In 2019 International Conference on Computational Science and Computational Intelligence (pp. 778–781). IEEE. https://doi.org/10.1109/CSCI49370.2019.00148

Nisan, N., & Schocken, S. (2008). The elements of computing systems: building a modern computer from first principles. MIT Press.

Park, H., Ko, Y.-W., So, J., & Lee, J.-G. (2013). Synthesizable manycore designs with FPGA in teaching computer architecture. International Journal of Control and Automation, 6(5), 429–438. https://doi.org/10.14257/ijca.2013.6.5.38

Schuurman, D. C. (2013). Step-by-step design and simulation of a simple CPU architecture. In SIGCSE 2013: Proceedings of the 44th ACM Technical Symposium on Computer Science Education (pp. 335–340). ACM.
https://doi.org/10.1145/2445196.2445296

Strelzoff, A. (2007). Teaching computer architecture with FPGA soft processors [Conference presentation]. American Society for Engineering Education (ASEE) Southeast Section Conference.

Tappero, F., & Mealy, B. (2013). Free range VHDL. The no-frills guide to writing powerful code for your digital implementations. Free Range Factory.

Udugama, L. S. K., Geeganage, J., & Kuruppuarachchi, W. V. (2013). A configurable multi-core processor for teaching parallel processing. In 2013 IEEE 8th International Conference on Industrial and Information Systems (pp. 326–331). IEEE. https://doi.org/10.1109/ICIInfS.2013.6732004

Zavala, A. H., Huerta-Ruelas, J. A., Camacho, O., & CarvalloDomínguez, A. R. (2015). Design of a general purpose 8-bit RISC processor for computer architecture learning. Computación y sistemas, 19(2), 371–385. https://doi.org/10.13053/cys-19-2-1941